ECE/CS 752 Advanced Computer Architecture I
Last modified Friday, 17-Nov-2017 10:43:12 CST
Homework and Quizzes
- 10/27/17: Reading and review schedule for midterm 2 now posted.
- 10/20/17: Midterm 1 will be open book and open notes, but no internet access or laptop use allowed.
- 10/20/17: Added suggested project topics.
- 10/18/17: Sample exams now posted for midterm 1 review.
- 10/18/17: HW2 solution is now posted.
- 10/13/17: HW1 and HW2 handouts now include necessary figures and tables.
- 10/11/17: Office hours cancelled on Tuesday 10/17 due to MICRO.
- 10/11/17: Lecture cancelled on Monday 10/16 due to MICRO.
- 10/11/17: Lecture cancelled on Friday 10/13 -- attend the affiliates talks at WID DeLuca (first floor) all day Thursday and Friday 8:30-12:00 if you wish.
- 10/11/17: Homework 2 posted. This homework will not be collected or graded, but will help you prepare for the midterm.
- 10/11/17: Posted solution to HW1.
- 10/04/17: Homework 1 posted. This homework will not be collected or graded, but will help you prepare for the midterm.
- 09/18/17: Office hours cancelled for Tuesday 09/19.
- 09/14/17: The course mailing list address was changed to email@example.com.
- 09/13/17: Prof. Lipasti's office hours set for T 10-11:30, W 12:30-2pm
- 09/08/17: Initial Canvas page now set up, including dropboxes for paper reviews.
- 09/08/17: Schedule and guidelines for paper reviews posted.
- 09/08/17: The reading list for Midterm 1 is now available. Please keep up with the readings as they line up with the course lecture schedule.
- 09/06/17: The class will meet for the first time on Wednesday, Sep 6, 2017, in EH3355.
- 09/06/17 The class will meet MW 11-12:15 in EH3355 and F 11-12:15 in EH2349.
- 09/06/17 Birth of the ECE/CS 752 web page.
Mailing list (only registered students can send messages):
Office: 3621 Engineering Hall
Office Hours: T 10-11:30, W 12:30-2pm
This course will teach you the principles of operation of
modern high-performance microprocessor cores, chips, and
ECE/CS 552 is a firm prerequisite; if you are a transfer or graduate
student without this course background, you should be very familiar
with logic design and should have already designed a working
instruction set processor. You should be very familiar with
pipelined execution, data hazards, and basic control speculation,
along with simple cache memories and virtual memory. If you do not
have this background, you will have to do some catch-up reading to keep
up in this course.
Refer to the course syllabus for
The recommended course textbook is Modern Processor Design: Fundamentals of Superscalar Processors, by John Shen and Mikko Lipasti, paperback edition.
The earlier hardcover edition published by McGraw-Hill is nearly identical and a used version of that book is fine.
The large format (8.5"x11") paperback beta version is missing a lot of the content covered in this course.
There are also several international versions which are probably suitable. Feel free to check with the instructor.
- Lecture 01: Introduction [PDF][PPT]
- Lecture 02: Technology challenges [PDF][PPT]
- Lecture 03: Pipelining Review from ECE 552.
- Lecture 15: Pipelining [HTML5]
- Lecture 16: Pipeline Hazards [HTML5]
- Lecture 04: Pipelining to Superscalar [PDF][PPT]
- Lecture 05: Superscalar Organization [PDF][PPT]
- Lecture 06: Caches and Memory Hierarchy from ECE 552.
- Lecture 19: Cache Concepts [HTML5]
- Lecture 20: Cache Design [HTML5]
- Lecture 21: Cache Performance [HTML5]
- Lecture 22: Virtual Memory [HTML5]
- Lecture 07: Instruction Flow [PDF][PPT]
- Lecture 08: Register Data Flow [PDF][PPT]
- Lecture 09: Memory Data Flow [PDF][PPT]
- Lecture 10: Pentium Pro Case Study [PDF][PPT]
- Lecture 11: Advanced Caches [PDF][PPT]
- Lecture 12: Main Memory [PDF][PPT]
- Lecture 13: Advanced Microarchitecture [PDF][PPT]
- Lecture 14: Executing Multiple Threads [PDF][PPT]
- Eyeriss slides from ISCA 2016.
- Homework 0, due in lecture on Fri, Sep. 8, 2017
- Homework 1 [PDF], not graded or collected; use to review and prepare for Midterm 1. NOTE: assume 35% integer and 5% shift for Problem 1.
- HW1 Solution.
- Homework 2, not graded or collected; use to review and prepare for Midterm 1.
- HW2 Solution
To check your recorded grades, log in to Canvas using your NetID and password (same as your as @wisc.edu email username or your my.wisc.edu login).
- Midterm 1, held in class on Wednesday 10/25/2017
- Reading list
- Exam scope is Ch 1-5 (except 3.7 on I/O), 9 in the textbook.
- Lecture notes 01-10.
- The midterm is open book, open notes. You should bring a calculator. However, you will not be allowed to use a laptop or access the internet during the exam.
- Sample exam from 2005, without solutions.
- Sample exam from 2008, without solutions.
- Review slides: [PDF][PPT]
- Midterm 2, held in EHxxxx from 10:05am-12:05pm during the final exam slot on Wednesday, Dec. 20, 2017
For the course project you will do a research-focused project.
This may involve reimplementing an idea proposed
in a paper we read in the class (or outside of class) or
trying something new that you have come up with.
The following link includes some possible suggestions
for both options (note: many of these ideas are confidential; please do not disseminate without first discussing with Prof. Lipasti):
You will be required to do the following for the final project:
- Submit a 2 page proposal by midnight on October 30, 2017 using the course dropbox. This must detail what you plan to do, why you plan to do it, and how you plan to do it.
- Submit a 2-3 page progress report by midnight on November 22, 2017 using the course dropbox. This must report your current progress on achieving the goals you set in your initial proposal, and how you will recover or reset your goals if you are behind.
- Prepare an oral presentation of approximately 25 min. (20 minutes presentation + 5 minutes for questions) for a scheduled slot during the last week of class. This should motivate the problem, describe what you did, and present some interesting results. Place your presentation slides in the course dropbox.
- Submit a detailed final report by midnight on Dec. 13, 2017 using the course dropbox. This should detail all relevant information about your project at an appropriate level of detail. Neatness, organization, and quality of writing will all count towards your grade.
Note that originality is not required (however, it is encouraged) for the project, nor are "positive" results (in other words, you will not be penalized for finding that a proposed scheme does not work). You will be graded based on your effort and on the quality of your presentation and report.
WARNING: some of these gzipped tar files are quite large. Make sure you have plenty of disk space (several hundred MB in some cases).
SPEC2006 x86 binaries and runscripts (licensed only for use at Univ. of Wisconsin). Use the *.do.it.sh scripts in each benchmark subdirectory to run.
SPEC2006 source code distribution (licensed only for use at Univ. of Wisconsin).
SPEC95 little-endian PISA binaries (including go for hw2)
SPEC2000 Integer EIO Traces for sim-outorder/alpha
libexo/libexo.c patched source file that you may need for these EIO traces to work correctly
SPEC2000 Integer binaries and runscripts for sim-outorder/alpha
SPEC2000 Floating Point EIO Traces for sim-outorder/alpha
SPEC2000 Floating Point binaries and runscripts for sim-outorder/alpha
The EIO traces can be used with simplescalar/alpha running on linux. See README.eio within the simplescalar distribution. You will have to compile simplescalar to use the alpha instruction set by typing "make config-alpha".
The runscripts/binaries can be used on any little-endian machine (linux/intel). I don't think they will work on the CAE Sun workstations, which are big-endian.
Note: if you have trouble accessing this page, contact Mikko